1. Field of the Invention
The present invention relates to a transistor using a nitride semiconductor and a method for fabricating the same.
2. Description of the Related Art
A semiconductor device using a nitride compound semiconductor such as GaN, AlGaN and others, e.g., a transistor such as a field effect transistor (FET), is being expected to be a next-generation power device. The conventional nitride compound semiconductor such as a device using the GaN semiconductor has been fabricated by using a sapphire substrate or a SiC substrate on which crystal of GaN may be readily grown.
By the way, because the substrate itself of the sapphire and SiC substrates is expensive, it is now considered to use a Si substrate whose wafer size may be enlarged and which is inexpensive. However, because a difference of coefficient of thermal expansion and a difference of lattice constant of Si with those of the nitride compound semiconductor, e.g., GaN, are large as compared to sapphire and SiC, it is difficult to grow crystals and crystallinity of the nitride compound semiconductor grown on the Si substrate is prone to be inferior as compared to that formed on the sapphire substrate for example. Due to that, there has been a problem that a leak current increases if a device such as an FET is fabricated by using the nitride compound semiconductor on the Si substrate and when high voltage is applied to the device.
As technologies for reducing the leak current in the device using the nitride compound semiconductor, Japanese Patent Application Laid-open No. 2005-183551 (Patent Document 1) forms a barrier layer between a gate electrode and a semiconductor layer by AlN whose electronic affinity is smaller than that of an electron supplying layer. Japanese Patent Application Laid-open No. 2004-247709 (Patent Document 2) includes Si in a gate electrode and interposes AL2O3 between a GaN layer and a gate electrode. Japanese Patent Application Laid-open No. 2004-186679 (Patent Document 3) discloses a technique of recovering damages caused on the surface of a compound semiconductor layer by dry etching by surface-treating by nitrogen plasma.    [Patent Document 1] Japanese Patent Application Laid-open No. 2005-183551 Gazette    [Patent Document 2] Japanese Patent Application Laid-open No. 2004-247709 Gazette    [Patent Document 3] Japanese Patent Application Laid-open No. 2004-186679 Gazette
However, all of the Patent Documents 1 through 3 are what suppress the leak current in the gate electrode and the gate leak has been a problem specifically in a high-frequency FET. However, it has been found that the leak current flows also between the source and drain, in addition to the gate leak described above, when such device is used as a power device in which high voltage is applied between the source and drain. That is, if the crystallinity is inferior, e.g., the nitride compound semiconductor on the silicon substrate, and when the high voltage is applied between the source and drain, there has been a problem that the leak current flows even during when the gate electrode is turned OFF.